1. Field of the Invention
The present invention relates to a semiconductor device having a power semiconductor element involving a main current section and an emulation current section that follows a current of the main current section, and a method for producing the semiconductor device.
2. Description of the Related Art
FIG. 13 shows a power semiconductor element disclosed in Japanese Unexamined Patent Publication No. 2-285679 filed. The disclosed element includes vertical channel double diffusion insulated gate transistors (DMOS transistors). Each of the DMOS transistors has a deep well 101 that does not extend under a gate electrode 102 and works to prevent a punch-through of a source, and a channel well 104 that reaches a channel 103 under the gate electrode 102 and determines the threshold voltage of the transistor. This element involves a main current section and an emulation current section (a detection section) for detecting a current of the main current section. Between the main and emulation current sections, a thick insulation film 105 is formed on the substrate 100. This insulation film 105 prevents adjacent DMOS transistors of the main and emulation current sections from conducting to each other through a parasitic lateral p-channel MOS transistor effect. The semiconductor element also has an annular well 106 for relaxing an electric field,, The annular well is formed under the insulation film 105 in the same doping process that forms the well 101.
According to this semiconductor device, distances W1 and W2 between the annular well 106 and the adjacent channel wells 104 fluctuate due to mask aligning errors. The fluctuations change the ratio of a current flowing in the detection DMOS transistor to a current flowing in the main DMOS transistor.
FIG. 14 shows measurement results of the width W1 and ON-resistance R corresponding to the width. The ON-resistance fluctuates widely depending on deformation in the shape of a depletion layer between adjacent wells. This results in changing a current flowing in the detection DMOS transistor. Namely, fluctuations in the widths W1 and W2 change a ratio of a current flowing in the detection section to a current flowing in the main current section.